Intel sets a goal for 2030 with a trillion-transistor chip

Intel's aspirations in the chip packaging industry are reaching new heights as the company sets its sights on creating a chip with a trillion transistors by 2030. This ambitious goal reflects an acceleration beyond the traditional pace set by Moore’s Law, a principle initially developed by Fairchild Semiconductor and Intel. Moore's Law originally stated that the number of transistors on a chip would double every year, but over time, this rate has slowed down, with doubling now occurring approximately every three years.

Intel CEO Pat Gelsinger recently confirmed the company's intention to outpace Moore's Law by 2031. In his discussion, he introduced the concept of "Super Moore’s Law" or "Moore’s Law 2.0," which aims for even higher transistor counts. Intel's progress in this area is not happening in isolation. TSMC and Samsung Foundry are poised to play significant roles in the development of Intel's new chips, which will be built on a 2nm node. This technological advancement is also influencing other industry players, with Qualcomm transitioning to TSMC and Samsung Foundry for its chip manufacturing needs.

Gelsinger acknowledged the changing landscape of chip manufacturing, stating, “I think we’ve been declaring the death of Moore’s Law for about three to four decades." He admitted that the industry is no longer in the "golden era" of Moore's Law, with doubling now effectively closer to every three years, marking a slowdown in the trend.

Intel sets a goal for 2030 with a trillion-transistor chip

Intel aims to achieve the milestone of 1 trillion transistors on a chip by 2030, a goal that has been hinted at previously by other Intel officials, including Ann Kelleher, Executive Vice President and General Manager at Intel's Technology Development. Kelleher noted the slowing pace of traditional scaling as Moore's Law progressed.

To reach this trillion-transistor mark, Intel plans to employ advanced packaging and heterogeneous integration techniques, allowing for a greater density of transistors on a chip. Additionally, the company is exploring the use of RibbonFET, a technology utilized by Samsung for its 3nm production, which encompasses all four sides of a transistor to reduce current leakage. Another innovative approach involves PowerVIA Power Delivery, which moves power supply lines to the back of the chip to enhance performance.

However, these technological advancements come at a significant cost. Gelsinger commented on the changing economics of chip manufacturing, noting that the cost of a modern fab has doubled from approximately $10 billion seven or eight years ago to around $20 billion today.

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